This invention relates to a lead frame applicable to various multibit configurations, to a semiconductor device having the lead frame, and to a method of manufacturing a semiconductor device, in which the lead frame is used and prevents adhesive tape from peeling from a semiconductor chip and the characteristics of the device from being deteriorated.
A semiconductor memory device has been required to have a high performance. For example of the 16 MB DRAM, various multibit configurations (e.g. .times.1, .times.4, .times.8, .times.9, .times.16, .times.18, .times.32, .times.36) are realized in the device now put into the market.
However, the manufacturing of various types of memory chips each having different multibit configurations results in a remarkable increase of the manufacturing cost.
Further, the chip size increases in accordance with the increase of the integration density of a semiconductor memory device. Several manufacturers have thus begun to employ the LOC (Lead On Chip) structure to reduce the device size.
In addition to the above, a semiconductor memory device is required to incorporate all the functions of the device into one chip such that various multibit configurations can be easily realized merely by changing the connections of the bonding wires.
A memory chip is thus formed to contain all the multibit configurations (i.e., formed in a one-chip) such that the multibit configuration of the device can be changed by changing the connections of the leads. By forming the device in such a manner, the increase of the manufacturing cost of the device is suppressed, and the manufacturing steps such as an assembling step can be made in common to the devices having different bit configurations.
However, the semiconductor memory devices having the different multibit configurations are naturally different from each other in number of pins (the number of the outer leads), even though the devices have the same size.
The positions and the number of electrode pads of the memory chip thus change in accordance with the employed multibit configuration. Therefore, when the memory chip having the pins of the numbers different from that of the electrode pads of the device is contained in the package, various problems will occur even if the device is a "one-chip" memory chip.
In a one-chip memory, the electrode pads are used commonly by multibit configurations contained in the memory chip even though the multibit configurations are different from each other. Accordingly, the intervals between the inner leads of the small multibit configuration (i.e., the configuration having a small number of I/O lines and address lines) increase in comparing with the large multibit configuration (i.e., the configuration having a large number of the I/O lines and address lines).
FIG. 1 shows .times.8 bit configuration (400 mil, 32-pin) formed in a 64 MB DRAM in which .times.16 bit configuration (4M .times.16 bit) can be incorporated into a one-chip memory.
In such a device, the number of leads 4 of a lead frame 3 adhered to a surface of a semiconductor chip 1 with adhesive tape 2 is small, and thus large spaces 5 are formed between the leads 4.
If the spaces 5 are formed between the leads, the pressure applied on the adhesive tape 2 decreases, in the spaces 5, with the result that the adhesive tape peels off from the semiconductor chip 1 at the spaces during the die attaching step, as shown in FIG. 2.
The peeling off of the adhesive tape 2 makes the leads 4 unstable on the surface of the semiconductor chip 1, and may deteriorate the reliability of the device.
The peeling-off of the adhesive tape 2 may be prevented by dividing the adhesive tape 2. However, the adhesive tape 2 cannot be effectively divided due to the limitation of the forming technique of a metal mold used for the dividing. In addition, if the sizes of the divided tape portions vary in accordance with the multibit configuration contained in the device, the manufacturing step such as an assembling step cannot be made common to the different multibit configurations.
FIG. 3 shows the conventional device in which the peeling off of the adhesive tape is prevented in the above-mentioned .times.8 bit configuration.
In this case, the peeling-off of the adhesive tape is prevented by inserting comb-like dummy leads 6 into the large spaces between the leads 4.
With this method, there will be no problem if the dummy leads 6 are arranged to the positions of the pins disconnected from a pad 1a. However, if the comb-like dummy leads 6 are formed by branching the leads 4 which are connected to the pads 1a, the capacitance of the leads 4 from which the dummy leads 6 are branched will increase, and the electrical characteristics of the device will be deteriorated.
This arrangement for preventing the peeling-off of the tape should not be used particularly, when I/O pins such as an address pins are used, if the shape of the comb-like leads is notably different from that of the other leads.
As described above, with conventionally used means in which dummy leads are formed in large open spaces between the leads in order to prevent the adhesive tape from peeling off from the semiconductor chip, the electrical characteristics of the device may be deteriorated.